Architecture Modeling Engineer

Job description

We’re hiring experienced Architecture Modeling Engineers from junior to senior levels to play a key role in developing the designs that will bring our next-generation AI processors to life. **About Us:** Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets. The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location. **Architecture Modeling at Mythic:** At Mythic, architecture modeling is at the core of how we design and deliver breakthrough AI hardware. Our models allow us to quantify the real-world performance of new architectures—capturing critical tradeoffs in **throughput, latency, and efficiency**—before a single chip is built. Modeling plays a central role in active design development, predicting how AI workloads generated by the Mythic compiler will run on silicon. These models serve as a **golden reference** for verifying RTL implementations and enable our software teams to begin developing validation and customer-facing code long before hardware is available. Even after silicon arrives, our modeling tools remain invaluable, offering deeper insight into performance bottlenecks and guiding ongoing software optimization. ### Responsibilities - Architect and create various types of hardware models with varying goals - e.g. transaction-level, cycle-accurate. - Create or build on top of existing hardware models to simulate functionality of custom AI software. - Create prototyping models for estimating power, performance and area of new chip architectures. - Create cycle-accurate models of the hardware (C++/SystemC). - Collaborate with peer engineering teams to co-design and co-verify the hardware implementation. - Investigate new architectural ideas, many co-designed with other system components. ### Requirements - Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science. - 5+ years experience required creating performance models for architectural investigations. This experience can include time spent in academic work including papers, thesis, and dissertation work. The years required can be reduced if prior modeling experience is related to systems for AI. - Academic and working knowledge of a variety of hardware concepts such as CPUs, memory systems, bus interconnects, security, chip interfaces, etc. - Proficiency and experience with C++/SystemC as used in modeling. - Proficiency and experience with hardware modeling for performance and/or power. - Strong communication skills, both written and spoken.