CENTRALE LYON - PhD Silicon Photonics for Scalable Energy-Efficient AI Hardware Accelerators

Job description

The rapid expansion of artificial intelligence (AI) applications across cloud and edge environments is driving the need for highly efficient hardware capable of supporting increasingly demanding workloads. Among these, matrix multiplication – particularly General Matrix Multiplication (GEMM) – remains the dominant computational kernel in modern AI models, including deep neural networks and transformer architectures. Conventional electronic accelerators, while highly optimized, face growing challenges related to energy consumption, data movement, and scalability. Silicon photonics has emerged as a promising technology to address these limitations by enabling highbandwidth, low-latency, and potentially energy-efficient computation through optical signal processing. In particular, recent advances in photonic computing leveraging phase-change materials (PCM) offer new opportunities for implementing reconfigurable and non-volatile computational primitives directly in the optical domain. This PhD is part of the CAMELIA program (ASIC and Numérique agencies) within the targeted project LEAF, and aims to explore a hybrid photonic–electronic computing paradigm for AI acceleration. The central objective is to design and evaluate silicon photonics-based architectures for efficient GEMM operations, building on recent work demonstrating a reconfigurable photonic GEMM architecture based on PCM and stochastic computing. The proposed research will focus on extending this tile-based photonic GEMM approach toward large-scale matrix operations under realistic conditions. Key challenges include managing PCM-related constraints such as limited precision and quantization effects, mitigating noise and variability, and addressing interface latency between photonic and electronic domains. A major aspect of the PhD will be the development of system-level evaluation and benchmarking methodologies within a design-technology co-optimization (DTCO/SDTCO) framework. The objective is to provide quantitative and objective metrics for decision-making, including scalability analysis, computational throughput, and energy efficiency for target AI workloads. These evaluations will support both intermediate design exploration and the potential experimental validation of fabricated demonstrators within the broader program. In addition, the PhD will address electronic circuit design challenges associated with photonic accelerators, including interface circuits for control, programming of PCM elements, optical-to-electrical readout, and signal conversion. These aspects are critical for ensuring the practical integration of photonic computing units within heterogeneous AI hardware systems. The expected outcome is a set of novel architectures, models, and evaluation tools that will clarify the potential and limitations of silicon photonics for next-generation AI accelerators, and provide guidelines for scalable and energy-efficient implementations. Background: The candidate should hold or be about to obtain an MSc in Electronics Engineering, Photonics, or Computer Engineering. A strong background in computer architecture, integrated circuits, or photonic systems is expected. Knowledge of AI hardware accelerators, in-memory computing, or silicon photonics will be appreciated. Environment: The PhD will be carried out at the INL laboratory, within the CAMELIA program, as part of the LEAF project, in collaboration between leading academic and institutional partners in AI hardware and photonics. Starting dates: Fall 2026