Digital Design Engineer Lead (DDR5 SPD Hub)

Job description

Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world ---come join our team and see how YOU can make a difference. Job Description: Summary: SPD Hub Digital Designer Lead will lead the design development, design implementation, and verification of digital logic for DDR5 SPD Hub (Serial Presence Detect Hub) including register interface, control logic, security features, and I3C/I²C communication modules. This position requires both technical and leadership skills owning solid digital design fundamentals, familiarity with memory architecture, and experience in RTL development and chip integration while working closely with multi-disciplinary groups to drive and design key aspects of SPD Hub products. RESPONSIBILITIES: Participate in architecture definition and micro-architecture design for DDR5 SPD Hub features. Develop and lead RTL (Verilog/SystemVerilog) for I3C, I²C, RCD/SPD-Hub related control logic, ECC/parity and protection mechanisms. Perform and lead digital design verification/testcases using standard RTL/DV languages (Verilog, SV, UVM), strong documentation skills for spec/test plan documents. Works closely with digital design team and collaborate with analog/mixed-signal, DFT, and physical design teams to support full-chip integration. Work closely with firmware and validation teams to ensure correct system-level behavior. Solid knowledge of industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis tools, DFT, LEC, STA, etc Participate in bring-up, validation, and failure analysis for engineering samples. Provide documentation including design spec, timing diagrams, and integration guide. Good written/verbal communication English skills and strong team work/collaboration. REQUIREMENTS: • PhD or MS degree with 10+ years of experience in digital ASIC design. • Experience with memory subsystem architecture, preferably DDR4/DDR5 or SPD/RCD devices. • Experience with DDR5 SPD Hub or RCD/PMIC product development. • Knowledge of I3C (MIPI) protocol, I²C/SMBus, or SPD EEPROM behavior. • Experience with security logic, including encryption/authentication basics. • Strong knowledge of ASIC development process and digital design techniques. • Experience with programming, scripting and automation languages like Perl/TCL/Unix/Python and C/C++ • Executing tasks that hit project milestones • Knowledge/Experience with the following is a plus: embedded designs and/or firmware development knowledge of power management industry/applications experience of mixed signal design I2C, I3C, SPI, USB, PMBUS/USB-PD Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.