Embedded Systems Engineer – Super Intelligence Integration

We are seeking an Embedded Systems Engineer, Super Intelligence (SI) Integration, to support an architecture that connects commercial scientific, laboratory, and manufacturing equipment to orchestration and SI platforms. You will focus on device integration, firmware-adjacent engineering, and reliable machine interfaces that enable real equipment to be safely monitored and operated through software-driven workflows. This position is in the Materials Engineering Division (MED) within the Engineering Directorate. This position requires full-time on-site presence due to the nature of the work. This position will be filled at either level based on knowledge and related experience as assessed by the hiring team. Additional job responsibilities (outlined below) will be assigned if hired at the higher level. You will Bring up new devices, interfaces, and embedded systems used in laboratory and manufacturing environments. Build and maintain software connectors that link equipment, telemetry, and command pathways to orchestration and SI platforms. Implement and document machine-interface contracts, including command semantics, telemetry fields, units, timestamps, device states, and error conditions, so that orchestration and SI platforms can reliably use equipment capabilities. Write protocol-level integrations and supporting code for hardware-software interfaces rather than relying solely on vendor tools. Implement appropriate command validation, interlocks, approval points, and fallback behaviors for connected equipment in partnership with senior engineers and equipment owners. Develop test harnesses, diagnostic utilities, and debugging tools for hardware-in-the-loop workflows. Help standardize telemetry and command interfaces across hardware and software systems. Partner with senior engineers to address reliability, safety boundaries, and deployment readiness for connected equipment. Perform other duties as assigned. Additional job responsibilities, at the SES.2 level Design and debug complex device integrations involving multiple protocols, hardware components, and orchestration and SI platform services. Independently define and improve reusable interface patterns, including device contracts, safety-aware command paths, test harnesses, and diagnostic tools, to increase reliability across connected equipment. Diagnose integration failures involving device states, protocol layers, intermittent connectivity, and orchestration and SI platform services, and recommend practical corrective actions. Coordinate technical approaches with equipment owners and software partners, and provide informal guidance to less experienced contributors. Ability to secure and maintain a U.S. DOE Q-level security clearance which requires U.S. citizenship. Bachelor’s degree in electrical engineering, computer engineering, computer science, or a related field, or an equivalent combination of education and related experience. Experience with firmware, drivers, or hardware-software integration through coursework, projects, research, internships, or professional work. Familiarity with microcontrollers, embedded Linux, real-time operating systems, or comparable embedded environments. Experience writing code for hardware-protocol integrations using Python, C, C++, Rust, or similar languages. Familiarity with one or more hardware-communication protocols, such as CAN, Modbus, serial, I2C, or SPI. Ability to troubleshoot device bring-up, interface issues, and system-integration problems in a structured manner. Additional qualifications at the SES.2 level Ability to independently define or improve device-interface contracts and safety-aware command or control pathways for connected equipment. Ability to diagnose issues spanning multiple hardware components, protocol layers, and orchestration and SI platform services. Ability to independently develop and troubleshoot embedded or hardware-software integrations involving device protocols, telemetry, and control pathways. Qualifications We Desire Experience with MQTT, NATS, or similar messaging technologies. Exposure to ROS or ROS 2. Experience with hardware-in-the-loop testing. Background in robotics, mechatronics, industrial equipment, or laboratory instrumentation. Familiarity with edge-system considerations, such as latency, intermittent connectivity, remote diagnostics, or device lifecycle management. Pay Range $121,830 - $185,544 Annually $121,830 - $154,500 Annually for the SES.1 level $146,340 - $185,544 Annually for the SES.2 level This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting; pay will not be below any applicable local minimum wage. An employee’s position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, seniority, geographic location, performance, and business or organizational needs. #LI-Onsite Position Information This is a Career Indefinite position, open to Lab employees and external candidates. Why Lawrence Livermore National Laboratory? Included in 2026 Best Places to Work by Glassdoor! Flexible Benefits Package 401(k) Relocation Assistance Education Reimbursement Program Flexible schedules (*depending on project needs) Our values - visit Security Clearance This position requires a Department of Energy (DOE) Q-level clearance. If you are selected, we will initiate a Federal background investigation to determine if you meet eligibility requirements for access to classified information or matter. Also, all L or Q cleared employees are subject to random drug testing. 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