Hardware Design Engineering, Director - AEC / SCM & China Customer Support - Shanghai

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at [](http://www.asteralabs.com/). # Director, Hardware Design Engineering — AEC / SCM & China Customer Support **Reports to:** Senior Director, Hardware Design Engineering **Location:** Shanghai, China — Astera Labs Shanghai Design Center --- ## About Astera Labs Astera Labs is the connectivity backbone of rack-scale AI infrastructure. Our Active Electrical Cables (AEC), Smart Cable Modules (SCM), Silicon Evaluation Platforms, and rack-scale products deliver purpose-built, high-speed connectivity for the world's most demanding AI clusters. As our AEC and SCM product lines scale rapidly to meet hyperscale AI infrastructure demand — and as China-based OEM customers, hyperscale cloud providers, and system integrators increasingly adopt Astera Labs silicon and connectivity products — we are establishing a Shanghai-based hardware design center to drive product development, manufacturing collaboration, and customer engineering support in close proximity to our manufacturing partners and China-based customers. --- ## About the Role We are hiring a **Director of Hardware Design Engineering — AEC / SCM & China Customer Support** to establish and lead Astera Labs' Shanghai hardware design center. This role has dual mission ownership: 1. **AEC & SCM Product Design** — Primary ownership of Active Electrical Cable and Smart Cable Module hardware design execution, from architecture through production release, leveraging proximity to China-based cable assembly and module contract manufacturers 2. **China Customer Engineering Support** — Serving as Astera Labs' front-line hardware engineering partner for China-based customers (hyperscale cloud providers, server/switch OEMs, AI system integrators, cable/module manufacturers) who are integrating Astera Labs silicon into their own products or deploying Astera Labs AEC/SCM products in their infrastructure Active Electrical Cables and Smart Cable Modules are the highest-volume, fastest-growing products in Astera Labs' portfolio — connecting GPUs, switches, and accelerators across AI clusters at 112G and 224G per lane. Simultaneously, China represents one of the world's largest and fastest-growing markets for AI infrastructure, with a dense ecosystem of OEM customers who require local, responsive hardware engineering support. You will build and lead a multidisciplinary hardware engineering team in Shanghai — spanning electrical/flex/substrate design, mechanical engineering, hardware validation, and customer applications engineering — driving AEC/SCM product design excellence while serving as the trusted technical partner for Astera Labs' China customer base. Reporting to the Senior Director of Hardware Design Engineering, you'll operate with significant autonomy on AEC/SCM product execution and China customer engagement while maintaining strategic alignment on technology roadmap, design standards, and customer priorities with the global engineering organization. --- ## Key Responsibilities ### Shanghai Design Center Leadership - Establish, build, and lead Astera Labs' Shanghai hardware design center as the company's primary hub for AEC/SCM product design and China customer engineering support - Recruit, hire, and develop a high-caliber multidisciplinary engineering team in Shanghai, including: - High-speed electrical/flex/substrate design engineers - Mechanical engineers (connector, housing, thermal, cable interface) - Hardware validation engineers - Customer applications/hardware support engineers - Lab/test engineers - Define organizational structure, hiring roadmap, and operating model for the Shanghai center — balancing product design execution, customer support responsibilities, and global alignment - Establish lab infrastructure in Shanghai to support AEC/SCM prototype bring-up, characterization, validation, failure analysis, and customer demonstration/interoperability testing - Drive engineering culture that emphasizes design rigor, manufacturing awareness, customer responsiveness, and tight collaboration with Santa Clara headquarters and the Taiwan design center - Serve as the senior Astera Labs engineering leader in China — representing the company with customers, manufacturing partners, suppliers, and industry stakeholders in the region ### AEC Hardware Design - **Electrical & Substrate Design:** - Own the electrical design of Active Electrical Cable products — including retimer integration on flex circuits or rigid-flex substrates, high-speed differential pair routing, power delivery, and passive component placement within severely constrained cable module form factors - Design high-speed interconnect substrates/flex circuits supporting 112G and 224G PAM4 signaling — achieving target insertion loss, return loss, crosstalk, and impedance control within compact AEC geometries - Drive power delivery network design for AEC products — ensuring clean, stable power to retimer silicon under all operating conditions within minimal board area and thermal constraints - Define and enforce AEC-specific design rules — including trace width/spacing, via structures, impedance targets, stackup configurations, and material selection for high-speed flex/rigid-flex substrates - Collaborate with Signal Integrity engineering to validate channel performance through simulation and measurement correlation across the full AEC link path - **Mechanical Design:** - Direct mechanical design for AEC products — including connector mating interfaces (OSFP, QSFP-DD, or proprietary), housing/shell design, latching mechanisms, cable strain relief, overmold geometry, and cable-to-substrate transition structures - Drive thermal management design for AEC modules — ensuring retimer silicon remains within thermal limits across all deployment environments within compact housings - Ensure AEC mechanical designs meet relevant form factor and pluggable interface specifications with full dimensional compliance - Optimize mechanical designs for high-volume manufacturing — considering overmolding processes, housing injection molding, automated assembly compatibility, and cable handling requirements - Manage bend radius, strain relief, and cable exit geometry to ensure mechanical reliability under repeated plugging cycles and cable routing stresses - **Cable Interface & Assembly Design:** - Define cable-to-substrate attachment methodologies — including soldering, welding, crimping, or other termination approaches that maintain signal integrity and mechanical reliability at high speed - Collaborate with cable suppliers and contract manufacturers on cable construction specifications — conductor gauge, dielectric materials, shielding architectures, and cable bundle configurations optimized for AEC applications - Design for cable assembly manufacturability — ensuring termination processes, alignment tolerances, and quality inspection points are compatible with high-volume production at CM sites ### SCM Hardware Design - **Electrical & Module Design:** - Own the electrical design of Smart Cable Module products — integrating retimer/re-driver silicon with advanced management, diagnostic, and monitoring capabilities on module-level substrates - Design SCM circuits that support intelligent link management features — including CMIS-compliant register interfaces, temperature/voltage monitoring, link health diagnostics, and firmware-driven equalization tuning - Ensure SCM electrical designs accommodate the additional complexity of management interfaces (I2C/I3C, SPI, UART) alongside high-speed data paths without compromising signal integrity - Drive power management design for SCM products — including voltage regulation, power sequencing, power monitoring, and power reporting capabilities