Lead, FPGA Electrical Design Engineer

Job description

Job Title: Lead, FPGA Design Engineer Job Code: 43064 Job Location: Carlsbad, CA Schedule: 9/80- employees work 9 out of 14 days- totaling 80 hours worked- and have every other Friday off Job Description: We are looking for a talented FPGA design engineer with industry experience in wireless digital communications, modems, networking, and/or digital signal processing (DSP). We design advanced wireless digital communication systems and electronic warfare systems. Development efforts include the whole lifecycle of designs from proposals, requirement definition, coding, simulation, synthesis, place and route, and verification testing. We are looking for an engineer who enjoys challenging work with a team of talented engineers and can work well both with a team and as an individual contributor. San Diego provides incredible 365-day outdoor recreation options and cultural experiences, and L3Harris values your work/life balance so you can enjoy these opportunities. Are as of desired technical experience or education include: Forward Error Correction (FEC) Modulation Demodulation Digital filters Electronic Warfare Industry standard interfaces (e.g. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet). Networking FPGA verification through simulation and unit testing. Qualifications: Bachelor’s Degree and minimum 9 years prior related experience. Graduate Degree with a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience. Active U.S. security clearance Preferred Additional Skills: Experience in either VHDL (preferred) or Verilog development languages. Experience implementing complex modem and/or DSP circuits in programmable logic using FPGA devices. Equivalent experience in ASIC design is also applicable. Experience with modem FPGA development including Discrete-time Digital Signal Processing (DSP) and Digital Communications is highly desired. Modem or high-speed DSP data paths, digital filters, FFTs, and error-correction codes, Turbo or LDPC is preferred. Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets. Experience with HLS (High-Level Synthesis) Experience in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices. FPGA Design using High-speed serial interfaces (3+ Gbps) Experience with software and FPGA interface, memory controllers, and high speed interfaces. Must have experience with Testbench Architectures, working knowledge of Matlab, SystemC, C, and/or C++. Must be able to read, understand and review schematic drawings. Familiarity with code revision management tools such as Git/Bitbucket and JIRA. In compliance with pay transparency requirements, the salary range for this role in California, Seattle, Washington D.C., Maryland Greater Washington D.C. area, the city of Denver, Washington State and New York City, the salary range for this role is $127,500-$236,500.. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements. #LI-CS3