Lead Software Engineer- Uplink Systems

Job description

Job Details New ideas are all around us, but only a few will change the world. That’s our focus at JPL. We ask the biggest questions, then search the universe for answers—literally. We build upon ideas that have guided generations, then share our discoveries to inspire generations to come. Your mission—your opportunity—is to seek out the answers that bring us one step closer. If you’re driven to discover, create, and inspire something that lasts a lifetime and beyond, you’re ready for JPL. Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence. Responsibilities: The Ground Communications and Architecture Section provides engineering development, implementation, and maintenance of state-of-the-art and high-reliability technologies for NASA’s Deep Space Network (DSN). We’re seeking a Software Engineer (Uplinks Systems) to develop and maintain the software systems that control the DSN Uplink Tracking and Command Subsystem. This subsystem performs the critically important functions of signal generation, transmission, and transmitter control to send spacecraft command data as well as the tracking functions to implement spacecraft ranging. This role focuses on real-time signal processing software that interfaces with Software Defined Radios (SDRs) and FPGA-based hardware to generate modulated RF uplink signals supporting all NASA deep-space missions. You will be a member of the Control Systems and Electronics Group and work closely with teammates across the section supporting all phases of the lifecycle from inception through the end of maturity. Tasks include but are not limited to: Design, implement, test, and ship iterations of the uplink software package. Lead and mentor a small team of software and test engineers, providing technical guidance and managing dependencies. Own the software side of the interface to FPGA and mixed-signal hardware, defining and negotiating that boundary with the project team. Develop and maintain the signal processing capability of Uplink (error correction, modulation, signal generation), interfacing with software-defined radio (SDR) systems. Architect and maintain high-rate data paths between hardware and software, accountable for data integrity and timing across the path. Define the verification strategy for the subsystem and build the automated test capability that supports it. Maintain the software release schedule, balancing critical mission milestones with the capability and resources of the team. Make technical architecture decisions and defend them to stakeholders and leadership. Present updates of the project to program leadership in review meetings (PDR, CDR, etc.) showing the project meets the expected capability and minimizes risk. Work cross-collaboratively with stakeholders of the internal interfaces to the subsystem and the external users of the subsystem. Perform hands-on work testing and evaluating the software deployments in the lab and in the field ensuring requirements are satisfied. Work closely with OEs and engineers at the three DSN complexes worldwide (USA, Spain, and Australia). Travel occasionally ( Qualifications: Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or related technical discipline with typically a minimum of 9 years of related work experience; or Master's degree in similar discipline with a minimum 7 years of related work experience; or a PhD in a similar discipline with a minimum of 5 years of related work experience. 2+ years of experience leading or mentoring software engineering teams, or demonstrated technical leadership on complex projects. Strong C++ and working proficiency in Python. Experience developing software that interfaces directly with hardware. (FPGA-based systems, data acquisition, embedded platforms, or instrumentation) Experience architecting high-rate data transport between hardware and software over PCIe, Ethernet, or comparable interfaces. Experience with software that must meet timing, throughput, or data-integrity requirements. Experience implementing signal processing algorithms in production software (digital modulation schemes, FIR/IIR filtering, forward error correction) Experience working within a structured engineering process, including design reviews and requirements-based verification. Experience testing and debugging software against real hardware in a lab or operational field environment. Preferred Skills: Strong candidates will have depth in several of the following areas: Advanced experience or strong knowledge of signal processing systems. Experience in software development that interfaces with SDRs using various radio interfaces (Ethernet or PCI-E). Experience with SDR frameworks and drivers, such as USRP Hardware Driver (UHD) and RF Network-on-Chip (RFNoC). Implementing protocols from formal specifications and authoring interface definitions between subsystems. Direct experience with the implementation of communication data and telemetry systems. Experience with or knowledge of Consultative Committee for Space Data Systems (CCSDS) Space Link Extension (SLE). Experience with continuous integration (e.g., Jenkins or GitHub Actions) and modern source configuration control (e.g. git). Experience with software testing frameworks and test-driven development practices. Knowledge of container and runtime orchestration frameworks (Podman, Docker, or Kubernetes). Experience with project planning, resource estimation, and budget tracking for software development efforts. Owning release, deployment, and support of software for fielded systems. Leading root-cause investigations that span software, firmware, and hardware. Strong verbal and written communication skills. Direct deep space, DSN, or spacecraft communications experience is not required. We welcome strong candidates from avionics, radar, test and measurement, telemetry, instrumentation, industrial control, and comparable hardware-adjacent software domains. JPL has a catalog of benefits and perks that span from the traditional to the unique. This includes a variety of health, dental, vision, wellbeing, and retirement plans, paid time off, learning, rideshare, childcare, flexible schedule, parental leave and many more. Our focus is on work-life balance, and living healthy, fulfilling lives as we Dare Mighty Things Together. For benefits eligible positions, benefits are effective the first day of the month coincident with or immediately following the employee’s start date. For further benefits information click Benefits and Perks The hiring range displayed below is specifically for those who will work in or reside in the location listed. In extending an offer, Jet Propulsion Laboratory considers factors including, but not limited to, the candidate’s job related skills, experience, knowledge, and relevant education/training. The typical full time equivalent annual hiring range for this job in Pasadena, California. $170,872 - $215,384 JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law. In addition, JPL is a VEVRAA Federal Contractor. EEO is the Law. EEO is the Law Supplement Pay Transparency Nondiscrimination Provision The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are U.S. Citizens, Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here .