At Elevate Semiconductor, we empower semiconductor and system test customers by creating world class ICs that tackle the industry’s most complex automated test equipment challenges. Our innovative team designs the lowest power, highest density solutions to reduce cost of test while pushing performance forward.As a Senior Analog Design Engineer, you will contribute to the design and optimization of analog circuits used in high performance ATE products. You will work closely with cross functional teams and take ownership of circuit blocks from concept through silicon validation.This role is based in San Diego, CA and requires the individual to be onsite five days per week.Responsibilities Design and simulate schematics for a variety of high speed and precision CMOS ATE circuitsPerform layout, verification, and post layout simulation including Monte Carlo, SOAC, and corner analysisParticipate in mixed signal simulation at the channel and chip levelsDevelop circuit architectures with a focus on power, performance, and density optimizationSupport IC characterization, test development, and qualification activitiesCollaborate with internal teams including digital design, layout, test, and applicationsRequirementsBachelor’s degree in electrical engineering; Master’s degree preferred5-8 years of professional experience in analog IC designStrong foundation in analog CMOS circuit designExperience designing and analyzing feedback loops including stability and compensationSolid understanding of the full IC design, qualification, and manufacturing cycleHands on experience with analog and mixed signal EDA tools such as Cadence, Mentor Graphics, or TannerExperience with LVS and DRC using Cadence or Mentor toolsBenefits100% Employer Paid Health Insurance (Medical, Dental, Vision)Unlimited Paid Time OffPerformance BonusesFree Lunch Catered in by Local RestaurantsPrivate Equity OptionsRetirement PlansSabbatical ProgramTuition ReimbursementVolunteer DaysRelocation AssistanceConference Attendance SupportBiweekly Phone StipendEmployee Assistance ProgramThe salary range for this role is $115,000.00-$145,000.00. Starting salary will be aligned with your relevant experience and demonstrated capabilities during the interview process. Typically, candidates begin at the initial tier of our compensation range, with placement adjusted for candidates presenting extensive directly applicable experience.
At Elevate Semiconductor, we empower semiconductor and system test customers by creating world class ICs that tackle the industry’s most complex automated test equipment challenges. Our innovative team designs the lowest power, highest density solutions to reduce cost of test while pushing performance forward.
As a Senior Analog Design Engineer, you will contribute to the design and optimization of analog circuits used in high performance ATE products. You will work closely with cross functional teams and take ownership of circuit blocks from concept through silicon validation.
This role is based in San Diego, CA and requires the individual to be onsite five days per week.
Responsibilities
- Design and simulate schematics for a variety of high speed and precision CMOS ATE circuits
- Perform layout, verification, and post layout simulation including Monte Carlo, SOAC, and corner analysis
- Participate in mixed signal simulation at the channel and chip levels
- Develop circuit architectures with a focus on power, performance, and density optimization
- Support IC characterization, test development, and qualification activities
- Collaborate with internal teams including digital design, layout, test, and applications
Requirements
- Bachelor’s degree in electrical engineering; Master’s degree preferred
- 5-8 years of professional experience in analog IC design
- Strong foundation in analog CMOS circuit design
- Experience designing and analyzing feedback loops including stability and compensation
- Solid understanding of the full IC design, qualification, and manufacturing cycle
- Hands on experience with analog and mixed signal EDA tools such as Cadence, Mentor Graphics, or Tanner
- Experience with LVS and DRC using Cadence or Mentor tools
Benefits
- 100% Employer Paid Health Insurance (Medical, Dental, Vision)
- Unlimited Paid Time Off
- Performance Bonuses
- Free Lunch Catered in by Local Restaurants
- Private Equity Options
- Retirement Plans
- Sabbatical Program
- Tuition Reimbursement
- Volunteer Days
- Relocation Assistance
- Conference Attendance Support
- Biweekly Phone Stipend
- Employee Assistance Program
The salary range for this role is $115,000.00-$145,000.00. Starting salary will be aligned with your relevant experience and demonstrated capabilities during the interview process. Typically, candidates begin at the initial tier of our compensation range, with placement adjusted for candidates presenting extensive directly applicable experience.
Elevate’s mission is to serve our semiconductor and system test customers by providing world class test integrated circuits (ICs) that address the industry’s most complex ATE challenges. We strive to exceed our customer’s expectations, now and well into the future, through designing the lowest power/highest density solutions, with the goal of providing the lowest possible cost of test.
Elevate’s mission is to serve our semiconductor and system test customers by providing world class test integrated circuits (ICs) that address the industry’s most complex ATE challenges. We strive to exceed our customer’s expectations, now and well into the future, through designing the lowest power/highest density solutions, with the goal of providing the lowest possible cost of test.
