Senior FPGA Engineer, VHDL

Job description

Job Title: Senior FPGA Engineer, VHDL Job Code: 42454 Job Location: San Diego, CA Job Schedule: 9/80 (employee's work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off) Job Description: You will lead the design and development of high‑performance FPGAs for advanced communications systems. As a senior technical contributor, you will define architectures, develop VHDL, and optimize FPGA implementations for performance, power, and resource efficiency. You will drive projects from concept through deployment, ensuring robust verification, validation, and integration into larger system architectures. In this role, you will collaborate closely with hardware, software, and systems engineering teams, troubleshoot complex design issues, perform code reviews, and enhance existing FPGA designs for greater reliability and capability. You will also mentor junior engineers and help cultivate a culture of technical excellence and continuous innovation. Success in this position requires deep experience in digital and RF‑related FPGA design, proficiency with tools such as Xilinx Vivado, Intel Quartus, and ModelSim, and up‑to‑date knowledge of emerging FPGA technologies and industry trends. Strong analytical skills, attention to detail, and the ability to manage multiple projects are essential. This role may include up to 10% travel to support stakeholders and on‑site project needs. Essential Functions: Help shape project plans and estimates so the team starts with a clear understanding of the FPGA work ahead. Take system‑level requirements and turn them into practical FPGA architectures and specifications. Work side‑by‑side with RF and systems engineers to make sure the digital and RF pieces fit together cleanly. Design and refine FPGA solutions for RF communication systems, including key functions like filtering, mixing, signal conversion, and error‑correction. Build and verify DSP algorithms for modulation, demodulation, and other communication processing tasks. Prepare designs for target FPGA devices, run place‑and‑route with the right constraints, and analyze timing and resource usage. Contribute to and improve consistent development practices, including peer reviews and firmware processes. Create clear technical documentation—design review materials, block diagrams, interface documents, and test plans. Confirm performance through simulation, then integrate and test FPGA designs on the actual circuit‑card hardware. Active Secret Security Clearance or ability to obtain once hired. Required Qualifications (one of the following): Bachelor’s Degree and minimum 9 years of prior relevant experience Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience. Preferred Additional Skills: 9 years of experience with VHDL development and high-speed digital design and timing analysis. Experience with RF principles, including filtering, mixing, and signal conversion. Experience with digital signal processing (DSP) algorithms and their implementation on FPGAs. Experience with debugging tools including oscilloscopes, logic analyzers, and signal generators;system-level simulation tools such as MATLAB/Simulink. Experience with embedded systems and microcontroller interfacing Designing for space environments An active Top Secret or TS/SCI clearance Exceptional communication skills with ability to clearly document and present designs and implementations In compliance with pay transparency requirements, the salary range for this role in California is $127,000 – $236,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.