Senior Principal HW/SW Co-Design Lead

Job description

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact micro-controllers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. This role is a technical leader that bridges between HW and SW to ensure world-class solutions for our customers. The selected candidate will be a bridge to central SW team and will reside and work alongside the HW team to reuse and develop low level drivers. Responsible for ensuring high quality drivers to take full advantage of HW features and make them available via the SDK to customers (internal and external). He will drive HW-SW to ensure consistency, early verification of drivers and ROM features in simulation and in emulation before silicon tape out. The role will also ensure that product verification (SW + HW teams) and all validation teams are enabled with the same drivers for validation of the product. Your Responsibilities. Technical lead for given SOC products in developing low‑level IP firmware (device drivers) for MCU platforms, ensuring high quality and reusability. Work closely with central SW teams to maximize reuse, consistency and ensure HW compatibility. Define and drive software architecture methodologies, standards, and best practices that enable consistent and reusable low‑level APIs across programs. Architect and deliver comprehensive IP firmware/driver solutions that support all phases of the lifecycle—RTL verification, virtual simulation, SoC verification, post‑silicon validation, and SDK integration Partner with pre‑silicon and post‑silicon teams to align HAL/SDK development with IP interface requirements and features. Work closely with HW, SW architects and SOC designers to initiate firmware development in parallel with hardware development. Review hardware register definitions and documentation early and regularly to remove disconnects and provide actionable feedback to improve software usability and long‑term maintainability. This role owns any gap closure. Establish and maintain backward‑compatible software interfaces as hardware IP evolves across products. Ensure linkage with HW IP and central SW team. Create architectural frameworks that promote consistency and scalability of driver implementations. Define best practices for delivering enablement drivers alongside hardware IP, ensuring smooth integration into SoC platforms and customer SDKs. Support multiple execution environments—simulation, emulation, and silicon—to ensure robust API behavior. Champion quality practices including design reviews, code reviews, static analysis, and adherence to coding standards. Produce clear, comprehensive technical documentation, reports, and presentations for stakeholders and milestone reviews. Use Git, JIRA, and Confluence to drive project execution, collaboration, and traceability. Mentor and guide junior and mid‑level software engineers, providing technical leadership and fostering a collaborative team environment. Contribute to ongoing optimization of firmware development workflows, tools, and cross‑team processes. Your Profile . Master’s degree in Electrical Engineering, Electronics Engineering, or a related field. Experience in RTL simulation and emulation. Must be able to understand how SOC’s are built and be able to work with RTL, HW and SW verification environments. Minimum of 15 years of experience in architecture and/or firmware development for MCUs/MPUs. Deep expertise in MCU/MPU SW architecture and low‑level firmware development, including RTL bring‑up, driver design, and platform‑level integration. Ability to lead by influence and bring cross‑functional teams together to accomplish goals. Experience leveraging AI capabilities to accelerate software development and documentation. Proficiency with ARM processor subsystems, tools, and debugging methodologies. Experience working with embedded RTOS and compilers. Competence in low‑level software testing and debugging for MCUs and MPUs. Ability to work in a multi‑site, multi‑time‑zone environment. Proficiency in C/C++/Assembly languages and at least one scripting language. Excellent problem‑solving, analytical, and debugging skills. Strong communication and interpersonal skills, with the ability to effectively collaborate with cross‑functional teams and mentor junior engineers. Prior experience in a technical leadership role, driving projects and influencing technical direction is highly desirable. ----------- NXP is committed to equal pay for equal work and work of equal value and applies fair, consistent and transparent remuneration practices. As of the date of this posting, the estimated gross annual base salary range for this position in Italy is between 77,200 € and 106,300 € annually. This range is intended as a guideline. Actual compensation may vary based on qualifications, experience, skills, and specific business or organizational needs. This position falls under the applicable National Collective Labour Agreement (Metalmeccanica Industria). Where relevant, the total compensation package may also include additional elements such as annual incentive opportunities and/or equity, along with a competitive benefits package. More information about NXP in Italy... ----------- #LI-6710