Silicon Design Methodology and Automation - RV

Job description

Job Details: Job Description: Job Description: We are seeking a highly motivated Reliability Verification (RV) Design Methodology and Automation Engineer to develop, enhance, and maintain scalable automation, flows, and methodologies for EMIR (Electromigration and IR Drop) analysis and signoff. This role is critical in ensuring power integrity and reliability closure across advanced technology nodes and complex FPGA designs at Altera. The position involves close collaboration with design, physical implementation, QRE, project, and foundry teams to define signoff criteria, deploy robust EMIR methodologies, and execute project-level reliability verification. If you have strong experience in EMIR analysis, flow development, and automation, and enjoy working at the intersection of tools, methodology, and silicon signoff, we would love to talk to you. Key Responsibilities: Tool Development, Flow and Methodology: Develop and deploy state-of-the-art EMIR flows and methodologies for Altera silicon programs. Own automation and infrastructure for EMIR analysis, including setup, execution, data processing, and reporting. Drive standardization of EMIR methodologies across projects and technology nodes. Enable scalable and efficient use of EMIR tools such as Voltus and Redhawk-SC for signoff. Integrate EMIR analysis into broader design and signoff flows, ensuring alignment with power, reliability, and implementation requirements. Versatile and ready to mobilize between different domains outside of RV. Integration and Support: Execute project-level EMIR signoff , ensuring readiness and closure against defined reliability criteria. Lead advanced-node project RV execution and signoff , driving strategic reliability closure in close collaboration with Physical Design (PD) and QRE teams. Work closely with physical design teams to analyze EMIR violations, define mitigation strategies, and drive systematic closure. Collaborate with QRE, project teams, and foundries to define and refine EMIR signoff specifications and requirements. Support deployment and usage of custom RV tools such as Totem and Voltus-XFi where applicable. Provide technical guidance, documentation, and training to engineering teams on EMIR methodologies and best practices. Continuous Improvement: Evaluate emerging EMIR tool capabilities, methodologies, and modeling approaches to improve accuracy and productivity. Drive automation initiatives to reduce runtime, improve analysis coverage, and increase reliability confidence. Contribute to cross-domain reliability and power methodology development beyond EMIR when required. Explore AI/ML opportunities to enhance analysis efficiency, prediction, and debug productivity. Qualifications: Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Technical Skills: 6+ years of experience in EMIR and power integrity-related work within silicon design. Deep knowledge and hands-on experience with EMIR tools such as Redhawk-SC and Voltus ( strong Voltus background preferred ). Experience with custom reliability verification tools such as Totem and Voltus-XFi . Proven experience executing EMIR signoff for complex designs. Strong understanding of power integrity fundamentals, EM, IR drop analysis, and reliability closure. Strong coding and automation skills (e.g., Python, Tcl, Perl, shell, or similar). Experience working with advanced technology nodes and signoff methodologies. Soft Skills: Strong analytical and problem-solving skills with attention to detail. Effective communication and collaboration skills across cross-functional teams (PD, QRE, project, foundry, CAD). Ability to work independently and drive methodology ownership in a fast-paced environment. Preferred: Experience defining EMIR signoff criteria in collaboration with foundries and reliability teams. Familiarity with full-chip power analysis and correlation across tools and methodologies. Experience supporting multiple projects in a centralized methodology/CAD role. Knowledge of related domains such as thermal, package interaction, and system-level reliability. Interest in leveraging automation and AI/ML to improve EMIR analysis productivity and quality. Job Type: Regular Shift: Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.