Sr. Security Architect

Job description

Job Details: Job Description: We are seeking a Sr. Security Architect to drive security architecture for Client and Data Center SoCs , with a primary focus on using AI ‑ driven tools to build Specifications, Code, Test, and analyze security vulnerabilities at scale . This role defines how modern AI techniques are applied to security systems across firmware and low ‑ level system hardware/software—augmenting and surpassing traditional manual development and review. The successful candidate is a recognized technical expert who can combine deep SOC/Platform security expertise with hands ‑ on use of AI ‑ based analysis tools to build, test and uncover real security flaws, systemic risks, and cross ‑ layer attack paths early in the product lifecycle. Key Responsibilities Serve as the technical lead for SOC security architecture across Client and Data Center SOC/platform Definition: Boot ROMs, secure and measured boot flows Hardware–firmware–OS chains of trust AI Accelerator Security for Client NPU Lead security discovery using AI ‑ based analysis tools , with explicit responsibility for: Identifying firmware and low ‑ level vulnerabilities at scale Discovering insecure coding patterns and flawed design assumptions Uncovering cross ‑ layer attack paths spanning silicon, firmware, and system software Apply AI ‑ assisted code reasoning and large ‑ scale analysis to: Rapidly analyze large firmware and platform codebases Explore edge cases, rare failure modes, and adversarial scenarios Assess security impact of design choices and implementation tradeoffs Drive firmware ‑ focused threat modeling , enhanced by AI tools that broaden coverage, identify emergent risks, and reduce reliance on manual enumeration alone. Define and own firmware security architecture specifications , informed directly by insights from AI ‑ driven security discovery rather than policy or checklist ‑ only approaches. Partner deeply with SoC architects, silicon designers, firmware engineers, and OS/virtualization teams to translate discovered risks into concrete mitigations and architectural guidance and specifications . Shape platform and product security roadmaps by identifying systemic firmware and SoC risks revealed through AI ‑ scale analysis across multiple products and generations. Mentor senior engineers and architects, setting best practices for AI ‑ enabled security discovery, analysis, and review . What Success Looks Like: Client and Data Center SoCs ship with resilient firmware security architectures grounded in real analysis . AI ‑ driven security capabilities definition becomes a core pillar of firmware and SoC security practice , not a supplemental tool across multiple domains. (PMC, ESE, Punit, MCHECK etc ) Firmware and platform security issues are systematically discovered earlier , with broader and deeper coverage than traditional review methods. Engineering teams rely on this role as the authoritative voice on firmware security and AI ‑ enabled security discovery strategies . Other Work Location: Israel Qualifications: Qualifications: Bachelor’s or Master’s degree in Computer Science , Computer Engineering, Electrical Engineering, or equivalent experience. Extensive experience (typically 10+ years) in Client and/or Data Center platform or firmware security architecture . Hands ‑ on experience of 2 + years using AI ‑ based tools specifically for code generation and security discovery , such as: AI ‑ assisted static and semantic code generation and analysis Automated vulnerability discovery and reasoning over complex code paths dentification of insecure patterns and architectural weaknesses using AI 5+ years system ‑ level programming skills (e.g., C/C++, Rust) and security automation , validation (e.g., Python) . Preferred Qualifications Experience defining SoC, IP, or platform architecture specifications consumed across multiple teams or products. Proven track record of discovering or preventing critical firmware or platform ‑ level security issues before production. Experience scaling AI ‑ driven security discovery across large, shared firmware or platform codebases. Familiarity with Client and Data Center security technologies, including confidential computing and virtualization ‑ based security. Recognized influence as a technical leader within a large organization or industry ecosystem. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $190,610.00-361,480.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.